Large computer systems have a number of chips which operate at different clock frequencies. For example, the so called multichip module (MCM) in a machine we are developing to incorporate a new central processor (CP) could have chips that operate at three different frequencies. Most chips operate at the "normal system" frequency, which is also known as the "NEST" frequency. The CP chip operates at a "fast" frequency (2.times. the "normal system" frequency, while the CRYPTO chip operates at a "slow" frequency (1/2 or 1/2.5 the "normal system" frequency). All these chips need to synchronously communicate with each other. How this is to be done has been a vexing problem, especially in light of the fact that the solution needs to guarantee data integrity throughout the system.